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We are seeking a Silicon Validation Engineer to join our team at Synopsys, a leading provider of engineering solutions from silicon to systems.

As a Silicon Validation Engineer, you will validate SerDes PHYs that power the systems running the world, and the lab you work in will have the tools to do it right.

Responsibilities:

  • Test silicon implementations of high-speed SerDes PHYs using state-of-the-art lab equipment including oscilloscopes, network analyzers, and signal integrity tools
  • Debug silicon behavior and supporting hardware when test results do not match expectations, tracing issues across the analog circuit, test board, and measurement setup
  • Run characterization tests across PVT corners and operating conditions, then create detailed test reports that communicate results to design and product teams
  • Design and build custom test boards and hardware solutions to support bring-up, debug, and characterization of new PHY IP
  • Program FPGAs in Verilog to generate test patterns, control interfaces, and automate test sequences for protocols like USB, PCIe, SATA, and Ethernet
  • Write test automation scripts in Python or MATLAB to streamline data collection, analysis, and reporting
  • Collaborate with analog designers to investigate circuit behavior, apply theoretical knowledge to explain performance limits, and validate design assumptions in silicon

Requirements:

  • Bachelor's degree in Electrical Engineering or equivalent practical experience
  • Solid understanding of analog IC circuit design and behavior, especially in high-speed mixed-signal environments
  • Strong debugging skills with the ability to isolate issues across silicon, hardware, firmware, and test setup
  • Hands-on experience with lab equipment including oscilloscopes, network analyzers, signal generators, and power supplies
  • Software programming experience in MATLAB, Python, or similar environments for test automation and data analysis
  • FPGA programming knowledge using Verilog for test pattern generation and protocol control
  • Familiarity with high-speed interface protocols such as USB, PCI Express, SATA, or Ethernet is a strong plus
  • Experience with NRZ and PAM4 signaling, equalization techniques, or SerDes architecture is a plus

Benefits:

  • Comprehensive range of health, wellness, and financial benefits
  • Annual bonus, equity, and other discretionary bonuses may be eligible
  • Competitive total rewards package

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